SPV represents a further step forward in verification technology. It is a software environment , integrated with hardware simulation, designed for writing verification test suites. Most of the framework is made up of class libraries specific to verification that may be integrated with user C++ code.
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November 26 2010
SPV Choose Regev Technologies as a WW Rep

November 21 2010
SPVGUI + Hdl Analyzer

May 09 2010
Embedded HDL-Simulation Debugger

MATLAB
Run Time Integration

By
DPF - Digital Processing Framework.

Suitable for FPGA and ASIC
Performance - High speed (5x)
Standard C++ Language
Plug & Play - including libraries of components for Audio and Video
Platform - Windows, Linux and Unix